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We are seeking a skilled SoC Verification Engineer to join our dynamic team. In this role, you will be responsible for developing and executing comprehensive verification plans for complex System-on-Chip (SoC) designs. You will work closely with design engineers to define and implement verification strategies, including the use of advanced methodologies such as UVM or SystemVerilog. Your expertise will be crucial in identifying and resolving design issues, ensuring that the SoC meets all functional and performance specifications.

Your responsibilities will include creating and maintaining testbenches, generating test cases, and performing simulations to validate design functionality. You will also participate in code reviews and collaborate with cross-functional teams to enhance overall design quality. A strong understanding of digital design principles and experience with formal verification tools will be essential. Additionally, familiarity with scripting languages (e.g., Python, Perl) and debugging techniques will be advantageous in streamlining the verification process.

The ideal candidate will possess a degree in Electrical Engineering, Computer Engineering, or a related field, along with proven experience in SoC verification. Strong analytical skills, attention to detail, and the ability to work effectively in a team-oriented environment are essential for success in this position. If you are passionate about cutting-edge technology and eager to contribute to innovative designs, we encourage you to apply.

We are seeking a dedicated and skilled Staff SoC Verification Engineer (S) to join our dynamic team. In this role, you will be responsible for leading and executing verification strategies for complex System on Chip (SoC) designs. You will work closely with design and architecture teams to develop comprehensive verification plans, ensuring that our products meet the highest quality standards. Your expertise will be crucial in defining and implementing functional verification environments using advanced methodologies such as UVM (Universal Verification Methodology) and SystemVerilog. You will also be responsible for developing testbenches, creating verification IP, and conducting rigorous simulations to validate design functionality.

The ideal candidate will have a strong background in digital design and verification, with hands-on experience in both RTL and gate-level verification. You should possess a deep understanding of SoC architecture and be proficient in using tools such as ModelSim, VCS, or Cadence. Excellent problem-solving skills and the ability to work collaboratively in a fast-paced environment are essential. A Bachelor's or Master's degree in Electrical Engineering, Computer Science, or a related field is required, along with a minimum of 5 years of industry experience in SoC verification. You will also mentor junior engineers, driving continuous improvement in our verification processes and methodologies.

If you are passionate about pushing the boundaries of technology and thrive in an innovative environment, we would love to hear from you. Join us in shaping the future of SoC design and verification!